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Wednesday, October 26, 2016
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JTAG Intros Full-Featured Developers Suite
Eindhoven, Netherlands -- JTAG Technologies is introducing a new economically-priced software and hardware system for board-level and system designers for boundary-scan test and programming.
ProVision designer station.
The company's ProVision Designer Station offers a low entry price yet retains key features such as automatic test program generation (ATPG) for interconnections and in-system programming (ISP) for devices.
The ProVision Designer Station is suitable for the preparing all boundary-scan test routines that might be used in the design environment and beyond. The tool incorporates a highly automated test program generator for interconnects that takes advantage of a library of thousands of non-boundary-scan (cluster) device models to create a safe-to-execute, high-quality core test.
Rapid generation and execution of this "Interconnect Test" using the handy JT 3705/USB controller, that is included with the system, allows the user to gain quickly confidence that the core boundary-scan to boundary-scan pin connections of a design are defect-free. ProVision Designer Station also includes a unique scripting library known as JFT (JTAG Functional Test) that harnesses the power of the open-source Python
language to add sophisticated test options for logic clusters and for the programming of memory devices. Furthermore, additional interactive tools, such as ActiveTest, enable rapid generation of simple cluster tests and checks that might require only a small number of test patterns.
A serial vector format (SVF) player feature serves as a programmer for CPLDs and FPGAs, and the system also includes the sequencer module "AEX Manager."
Contact: JTAG Technologies, 1006 Butterworth Ct., Stevensville, MD 21666
877-367-5824 fax: 410-604-2108 Web:
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