Sunday, October 23, 2016
Home/Current Issue >  Industry Articles >  PCB and Assembly > 


A New Approach to Using Boundary Scan
SCANFLEX universal platform works with many kinds of fixtures.

Board-level production test equipment, such as in-circuit testers, using third-party boundary scan tools, have gained in popularity. Such integration often provides little benefit over standalone boundary scan systems. While some of those solutions provide improved test coverage by combining boundary scan and ATE resources, they introduce new problems such as skewed test coverage statistics and very limited portability. The HYSCAN concept was developed to overcome many of these limitations.

A typical standalone boundary scan system consists of a processing unit (a PC) running boundary scan software, a boundary scan controller, a power supply (to power the UUT), and cabling to connect the UUT to the boundary scan controller and the power supply.

Such a standalone boundary scan system supports various test and in-system programming applications utilizing the test resources available on the UUT (the boundary scan cells and other test features) — including, but not limited to, Interconnect Test, Memory and Logic Cluster Test, FLASH programming and PLD programming.

Some boundary scan systems provide tools to extend the test coverage by including non-boundary scan circuitry that may typically not be testable with automatically generated test patterns.

By complementing the UUT's on-board test resources with external test channels, the test coverage can be further extended to the UUT's interface circuitry on peripheral connectors. The diagnostic output can be improved (e.g. for cluster testing) when utilizing external access to test points on nets that are otherwise inaccessible via boundary scan.

Developing Test Programs
Even though both test coverage and diagnostics are improved when BScan I/O tester hardware is utilized, this method introduces new problems. When boundary scan tests are developed that consider only the UUT's test resources, then all test coverage statistics are based on the number of nets and the number of pins of the UUT only. By adding tester resources to the boundary scan setup, however, the tester resources themselves are included by automated test coverage analyzers, skewing the statistics.
Extended boundary scan applications, including interface tests.

For test generation, these boundary scan I/O tester resources are merged with the UUT net list. Then test programs are generated based on this merged net list (the tester I/Os become part of the UUT). This causes the number of nets and pins evaluated during the test coverage analysis to increase. The result of the test coverage analysis no longer represents the UUT, but rather the combined UUT and tester I/O configuration.

Since the boundary scan I/O resources are merged with the UUT net list for test program generation, the developed test pattern can only be executed on this specific tester configuration. As soon as the number or the order or the type of boundary scan I/O resources changes, the test pattern needs to be modified accordingly. This drastically reduces the portability of the boundary scan test programs.

A third problem of adding boundary scan I/O resources to the tester setup is the increased length of the scan chain. Additional TCK clocks required to shift the test pattern through the boundary scan I/O module — resulting in longer test execution time and reduced effective test throughput. However, such I/O modules can be connected to a separate boundary scan chain, reducing or eliminating the impact on test execution time.

Traditionally, boundary scan test coverage has been extended by using I/O resources on standalone test configurations only. There have also been boundary scan tools available on board-level ATE equipment, such as in-circuit testers. Oftentimes, however, these testers have been limited in their capabilities, which has led to interest in integrating third-party boundary scan tools. These tools typically offer more advanced features and better debugging capabilities, in addition to their ability to run as a standalone setup. Such integration allows the use of programs that had been designed for standalone systems, but now will run boundary scan applications on ATE equipment.

Using an in-circuit tester, a standalone boundary scan system may utilize I/O resources to extend the test coverage on the UUT's interface circuitry. Integrating boundary scan tools on an ICT, utilizing the bed-of-nails fixture to contact nets in order to improve testability and diagnostics, however, requires the development of additional test programs. It would be desirable to run the same test programs on the standalone system and on the integrated solution in order to reduce test development time and maintenance.

Independently Controlling Resources
The HYSCAN concept of independently controlling tester I/O resources has been developed to allow the execution of the same boundary scan test pattern on various ATE systems, without any modification. The principle behind HYSCAN is the separation of shift vectors and parallel I/O vectors. Test programs include both the test pattern for the UUT's boundary scan chain and for the tester's I/O resources. However, the test pattern for the I/O resources is independent from the actual tester hardware. The same I/O test pattern is used for boundary scan I/O modules, for parallel I/O modules, for in-circuit test nails, or for other ATE I/O resources. When the test programs are ported to the various ATE, the actual tester I/O resources are mapped to the I/O test pattern by a tester configuration and a wiring list.
Boundary scan system with HYSCAN capability.

Access to the UUT's peripheral interface connectors with HYSCAN I/O resources provides the same improvements in test coverage that can be achieved with boundary scan I/O modules that utilize scan chain access. However, since HYSCAN I/O patterns are not described as being part of a boundary scan chain, but rather as parallel I/O pattern, the test programs for such a configuration can be ported to utilize other ATE I/O resources (e.g. in-circuit tester channels) without any modifications in the test program. Furthermore, since the HYSCAN I/O pattern is independent from the UUT boundary scan description, the test coverage statistics are not distorted. The HYSCAN concept is based on a hybrid test pattern, combining serial access through the UUT's boundary scan chain and parallel access through tester I/O resources. These tester I/O resources should be individually programmable as input, output or 3-State. Voltage level programmability and considerable driver strength, combined with over current protection or other safety measures, are desirable.

For the test pattern it does not matter whether the I/Os are provided by parallel I/O modules or through tester channels on an in-circuit tester. The test program is generated based on the UUT net list and a description of which nets are accessible to tester I/O resources. Then, a tester configuration file and wiring list will provide information about the actual assignment of tester I/Os to nets on the UUT. Therefore, only the tester configuration and wiring list need to be adapted to the actual test setup, not the test program itself.
Example project with three HYSCAN tester configurations.

A standalone boundary scan system can be used with a PXI boundary scan controller, a PXI Digital I/O module with 192 channels (only 20 channels are used), a PXI Power Supply module, and a PXI Mixed-Signal I/O module. The 20 test channels from the I/O module are connected to a peripheral interface connector on the UUT. The test program controls both the UUT's scan chain and the I/O module's test channels.

On the in-circuit test system, the UUT's peripheral interface connector is accessed through a test fixture. The test channels are created by the in-circuit tester's I/O resources. The same test program that had been used on the standalone boundary scan test system now controls the UUT's scan chain and the in-circuit tester's test channels.

The Functional Test system provides access to the UUT's peripheral interface connector through parallel I/O modules, connected to the tester's I/O resources. In this configuration, the same test program used on the standalone boundary scan system and the in-circuit tester is applied.

Control of the various test systems' I/O resources is performed by HYSCAN drivers, which interface the boundary scan software and the tester configuration with the ATE software/hardware.

This new approach integrates boundary scan tools in various types of board-level automated test equipment. The HYSCAN concept provides a number of benefits over the use of traditional boundary scan I/O modules and previous integrations:

  • Portability between various test channel (adapter) types.
  • Accurate, non-misleading test results and test coverage statistics.
  • UUT and tester I/O resources do not have to be merged for the purpose of test program generation.
  • Developed boundary scan tests are independent of the test adapter type and the test system where they are executed.

Contact: Goepel electronics LLC, 9600 Great Hills Trail, Suite 150W, Austin, TX 78759 512-502-3010 fax: 512-343-3076 E-mail: Web:


search login