Thursday, August 17, 2017
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A Road Map to Successful Thermal Testing


Whether testing one device or millions, the ultimate goals of any thermal testing operation are efficiency, accuracy, and stability. Thermal forcing, clamping, and calibration methods are all variables, but the one common denominator in all test scenarios is the socket. Exatron's new ...

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Beyond Debug: XJTAG for Flash Programming and Board Test


The JTAG standard, first established by the IEEE 27 years ago, defines an electrical and physical method for connecting JTAG-enabled devices on a PCB, or across multiple PCBs. However, JTAG is not a general-purpose bus. The technology behind the interface differs significantly from ...

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Selecting and Optimizing Wet Processing Equipment


Microfabrication operations such as metal lift-off, stripping, etching, plating/coating, cleaning, and die-bonding are typically wet processing procedures. Yet, selecting the equipment to perform those procedures most efficiently and cost-effectively is often not a simple matter. In ...

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Shadow Moiré Measurement Techniques for Discontinuous and Semi-Reflective Surfaces


Flip chip packages are seldom perfectly co-planar; instead, there exists an angle between the die and package substrate, which becomes a critical factor in maintaining product yield and reliability. Point-to-point height measuring quality checks for die tilt can be time-consuming, and ...

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The Benefits and Risks of Copper Pillar Bumped Flip Chips: Part 2


Copper has inherently higher electrical and thermal conductivity than SnPb or SnAg/SnAgCu solders, by a factor of about 25. Higher conductivities reduce current density and temperature within the interconnect, which are the primary drivers for matter flow and electromigration (EM) failures ...

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Using Cell-Aware Scan Diagnosis to Improve Yields


Finding and diagnosing manufacturing defects in a failing device through scan diagnosis has long been a way to improve yields for both high-volume ICs and for new manufacturing processes. Scan diagnosis utilizes a design description, scan test patterns and failure data from a tester ...

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