Monday, May 21, 2018
Archive >  July 2013 Issue >  Electronic Mfg. Products > 

ASSET Releases New eBook on JTAG
JTAG testing outlined in new ebook.
Richardson, TX — A new eBook from ASSET® InterTech explains how the structural test methodology based on the IEEE 1149.1 boundary scan standard, known as JTAG, can apply functional tests to I2C and SPI system monitors during prototype board bring-up and later during production of the circuit board.

Devices such as temperature sensors, electrical sensors and others which communicate over the Inter-Integrated Circuit (I2C) and Serial Peripheral Interface (SPI) buses often keep track of certain conditions or operating parameters in electronic systems. When the condition exceeds a predefined range, the monitoring device will take an action, such as alerting the system's central processing unit (CPU).

The eBook, titled Functional Test on I2C and SPI System Monitors with JTAG, explains how a method based on device models can simplify and accelerate the development of functional tests for I2C and SPI monitors. These same routines can also program monitoring devices with their operating code.

JTAG-based functional tests can be deployed early during design when prototypes are being brought up so that both structural and functional defects can be detected in one step. These same routines can migrate with the circuit board design when it transitions into volume manufacturing, eliminating the need to re-develop some of the board's production tests. This reduces test costs, accelerates a new product's time-to-market, and improves fault coverage and diagnostics in manufacturing.

Contact: Asset InterTech, 2201 N. Central Expy., Ste. 105, Richardson, TX 75080 888-694-6250 or 972-437-2800 fax: 972-437-2826 Web:

Add your comment:

Full Name:

search login